About this Wiki

The purpose of this Wiki is to provide a forum to discuss the challenges, and possible solutions, related to advanced integrated circuit manufacture.

3DS IC Testing Task Force

Page Created:
January 12, 2012
12:27 EST

Page Updated:
January 10, 2013
16:18 EST

Page Version:
7 of 7

Version Author:
Rich Allen

Rationale: The Testing Task Force will develop standards, guidelines, and/or specifications for electrical testing related activities used in 3DS-IC manufacturing for the ultimate goal of yield enhancement

Organization: SEMI
Domain: Mfg/Process
Activity Type: Task Force (TFOF)
Committee: 3DS-IC

Current Activities

Guide for Incoming/Outgoing Quality Control and Testing Flow for 3DS-IC Products (D5485)

Links:

Organizing Document

Key Contact:

Catherine Chang (SEMI Taiwan, cchang@semi.org)

Comments (0)

Recently Added

Guide for Incoming/Outgoing Quality Control and Testing Flow for 3DS-IC Products (D5485) (10-01-2013)
Guide for CMP and Micro-bump Processes for Frontside TSV Integration (D5474) (10-01-2013)
Guide for Alignment Mark for 3DS-IC Process (D5473) (10-01-2013)
Test Method for Measuring Warp, Bow and TTV on Silicon and Glass Wafers Mounted on Wire Grids by Automated Non-Contact Scanning using Laser Scanning Interferometry (D5506) (10-01-2013)
Terminology for Measured Geometrical Parameters of Through-Glass Vias (TGVs) in 3DS-IC Structures (D5447) (10-01-2013)
Specification for Glass Wafers for Use in Bonded Wafer Stacks (3D2-0113) PUBLISHED STANDARD (10-01-2013)
Middle End Process Task Force (25-05-2012)
Guide for Metrology for Measuring Thickness, Total Thickness Variation (TTV), Bow, Warp/Sori, and Flatness of Bonded Wafer Stacks (D5409) (16-04-2012)
Wide IO DRAM Memory Specification – Low Power DRAM: Gen 2 (16-01-2012)
3DS IC Testing Task Force (12-01-2012)

Recently Modified

SEMI Standard Activities (11-04-2013)
Specification for Glass Wafers for Use in Bonded Wafer Stacks (3D2-0113) PUBLISHED STANDARD (11-04-2013)
Test Method for Wafer Bond Strength Measurements Using Micro-Chevron Test Structures (MS5-1211) PUBLISHED STANDARD (11-04-2013)
Guide for CMP and Micro-bump Processes for Frontside TSV Integration (D5474) (11-04-2013)
Guide for Multi-Wafer Transport and Storage Containers for Thin Wafers (D5175) (11-04-2013)
Guide for Metrology Techniques to be used in Measurement of Geometrical Parameters of Through-Silicon Vias (TSVs) in 3DS-IC Structures (D5410) (11-04-2013)
Guide for Metrology for Measuring Thickness, Total Thickness Variation (TTV), Bow, Warp/Sori, and Flatness of Bonded Wafer Stacks (D5409) (11-04-2013)
Guide for Describing Materials Properties for a 300 mm 3DS-IC Wafer Stack (D5173D) (11-04-2013)
3D Standards Dashboard (11-04-2013)
Wide IO DRAM Memory Specification – Low Power DRAM. PUBLISHED STANDARD: JESD229 (18-01-2013)

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About this Wiki

3DS IC Testing Task Force

Page Created: January 12, 2012 12:27 EST

Page Updated: January 10, 2013 16:18 EST

Page Version: 7 of 7

Version Author: Rich Allen