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Wide IO DRAM Memory Specification – Low Power DRAM: Gen 2

Page Created:
January 16, 2012
10:55 EST

Page Updated:
January 18, 2013
14:39 EST

Page Version:
3 of 3

Version Author:
Rich Allen

 


Scope: The purpose of this specification is the second generation to follow-on JESD229, to define the minimum set of requirements for JEDEC compliant, 1 Gb through 32 Gb SDRAM (monolithic density) devices with 4, 128b wide channels using direct chip-to-chip attach methods between 1 to 4 memory devices and a controller device. The WideIO specification defines features, functionalities, AC and DC characteristics, packages, and ball/signal assignments.

Organization: JEDEC
Activity Type: Standard
Committee: Solid State Memory (JC-42)
Sub-committee: Low Power Memories (JC-42.6)

Key Contact: TBD