Scope: This standard defines the Wide I/O specification, including features, functionality, AC and DC characteristics, packages, and micropillar signal assignments. This standard covers the following technologies: Wide I/O. The purpose of this standard is to define the minimum set of requirements for JEDEC compliant, 1 Gb through 32 Gb SDRAM (monolithic density) devices with 4, 128b wide channels using direct chip-to-chip attach methods between 1 to 4 memory devices and a controller device.
Organization: JEDEC
Activity Type: Standard
Committee: Solid State Memory (JC-42)
Sub-committee: Low Power Memories (JC-42.6)
Links
Key Contact: TBD
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